The gap between the size of microelectronic design/validation task and our ability to design these in a reasonable time is steadly increasing. We need tools and techniques to bridge this gap. Formal models and methods hold this promise by their focus on scalability, efficiency and design optimization. In additional, we need methodological innovations to bring formal techniques into practice. Exploiting the structure of the systems to decompose the problems into smaller ones, discovering the hierarchy and proper decomposition, abstraction, refinement, and other behavioral and structural properties of system are important for successful use of formal methods.