The Deep Neural Network (DNN) has significantly enhanced the performance of pattern classification and time series predictions for numerous important real-world applications. However, the complexity of a typical DNN network has also made it difficult to incorporate such an algorithm in low power mobile devices and internet of things. In this work, we present methods to approximate the performance of a trained DNN by modifying its structural design and discuss specific design cases.
This work is collaborated with Mr. Boyu Zhang and Professor Azadeh Davoodi at ECE department, UW- Madison.
Since 1987, he has been with the Department of Electrical and Computer Engineering, University of Wisconsin, Madison where he is currently a professor.
Dr. Hu's has broad research interests ranging from design and implementation of signal processing algorithms, computer aided design and physical design of VLSI, pattern classification and machine learning algorithms, and image and signal processing in general. He has published more than 400 technical papers, edited or co-authored four books and many book chapters in these areas.
Dr. Hu has served as an associate editor for the IEEE Transaction of Acoustic, Speech, and Signal Processing, IEEE signal processing letters, European Journal of Applied Signal Processing, Journal of VLSI Signal Processing, and IEEE Multimedia magazine. He has served as the secretary and an executive committee member of the IEEE signal processing society, a board of governor of IEEE neural network council representing the signal processing society, the chair of signal processing society neural network for signal processing technical committee, and the chair of IEEE signal processing society multimedia signal processing technical committee. He was also a steering committee member of the international conference of Multimedia and Expo on behalf of IEEE Signal processing society.
Dr. Hu is a fellow of IEEE.